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Microchip Technology /ATSAML11E16A /OSCCTRL /INTFLAG

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Interpret as INTFLAG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (XOSCRDY)XOSCRDY 0 (XOSCFAIL)XOSCFAIL 0 (OSC16MRDY)OSC16MRDY 0 (DFLLULPRDY)DFLLULPRDY 0 (DFLLULPLOCK)DFLLULPLOCK 0 (DFLLULPNOLOCK)DFLLULPNOLOCK 0 (DPLLLCKR)DPLLLCKR 0 (DPLLLCKF)DPLLLCKF 0 (DPLLLTO)DPLLLTO 0 (DPLLLDRTO)DPLLLDRTO

Description

Interrupt Flag Status and Clear

Fields

XOSCRDY

XOSC Ready
XOSCFAIL

XOSC Clock Failure Detector
OSC16MRDY

OSC16M Ready
DFLLULPRDY

DFLLULP Ready
DFLLULPLOCK

DFLLULP Lock
DFLLULPNOLOCK

DFLLULP No Lock
DPLLLCKR

DPLL Lock Rise
DPLLLCKF

DPLL Lock Fall
DPLLLTO

DPLL Lock Timeout
DPLLLDRTO

DPLL Loop Divider Ratio Update Complete

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data